Yohan Kim, Sanghoon Myung, Jisu Ryu, C. Jeong, Daesin Kim
{"title":"Physics-augmented Neural Compact Model for Emerging Device Technologies","authors":"Yohan Kim, Sanghoon Myung, Jisu Ryu, C. Jeong, Daesin Kim","doi":"10.23919/SISPAD49475.2020.9241638","DOIUrl":null,"url":null,"abstract":"This paper proposes a novel compact modeling framework based on artificial neural networks and physics informed machine learning techniques. This physics- augmented neural compact model shows highly accurate fitting abilities and physically consistent inferences even at the unseen data. It is also scalable and technology independent, and consequently, is suitable for electrical modeling of new emerging devices. In addition, this neural compact model is able to cover both digital and analog circuit analysis due to the weight decay regularization as well as high order derivative losses. Finally, it is applied to promising DRAM and Logic technologies to be evaluated in terms of its scalability and fitting accuracy. The CMC’s (Compact Model Coalition) standard model API (Application Programming Interface) supports the custom model implementation for SPICE. Therefore, this framework enables the circuit simulators to assess technology-independent PPA (Power, Performance, Area) and early-stage DTCO (Design Technology Cooptimization) for new emerging devices.","PeriodicalId":206964,"journal":{"name":"2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/SISPAD49475.2020.9241638","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
This paper proposes a novel compact modeling framework based on artificial neural networks and physics informed machine learning techniques. This physics- augmented neural compact model shows highly accurate fitting abilities and physically consistent inferences even at the unseen data. It is also scalable and technology independent, and consequently, is suitable for electrical modeling of new emerging devices. In addition, this neural compact model is able to cover both digital and analog circuit analysis due to the weight decay regularization as well as high order derivative losses. Finally, it is applied to promising DRAM and Logic technologies to be evaluated in terms of its scalability and fitting accuracy. The CMC’s (Compact Model Coalition) standard model API (Application Programming Interface) supports the custom model implementation for SPICE. Therefore, this framework enables the circuit simulators to assess technology-independent PPA (Power, Performance, Area) and early-stage DTCO (Design Technology Cooptimization) for new emerging devices.