Experimental and computational modelling characterisation of fine particle Pb-free solder paste volumes for flip chip assembly applications

Abstract

Advanced flip-chip technology is the key technique used to achieve a high-density assembly of components onto printed circuit boards (PCB). Increasing demands are being made on electronics manufacturers to use flip chip components with greater input/output capabilities at pitches below 0.100 mm for their future applications. Furthermore, the advancement in this technology is challenged by the requirement to use new Pb-free materials for interconnections; this being driven by the European directive, Waste from Electronic and Electrical Equipment (WEEE) that necessitates the elimination of lead containing materials from electronics products by January 2006. The advancements in flip chip technology place a requirement for ultra small solder volumes in joint interconnection. Volume also plays a significant role towards the long-term reliability of the joints. Computational modelling can yield reliability data and required solder volumes for flip chip interconnection. However, in order to implement small solder volumes into a flip chip assembly process, a firm understanding of the formation and subsequent behaviour throughout the process is required. In this investigation, stencil printing of Pb-free solder paste via small stencil apertures, required for ultra fine pitch flip-chip applications, is reported, highlighting the issues encountered at such small geometries.