TFT (thin film transistor) cell technology for 4 Mbit and more high density SRAMs

Abstract

Thin-film transistor (TFT) cell technology has been proposed for high-density SRAM cells. It was demonstrated that when utilizing this technology both low standby current and high cell stability are obtained simultaneously without increasing cell size. TFT characteristics required for 4-Mb SRAMs are discussed, and it is noted that improvements in packing density while maintaining low standby current cause difficulties in achieving stable cell characteristics in very-high-density SRAMs using a conventional high-resistance load cell (Hi-R cell). In SRAMs with feature size of 0.5 μm or less, operation voltage is lowered due to severe hot-carrier-induced degradation in MOSFETs. To achieve desirable characteristics for future SRAMs, the grain size dependence of TFT characteristics was investigated. It is shown that low-temperature regrowth of α-Si is a promising method to obtain very large grain size, resulting in excellent TFT characteristics. TFT technology was applied to a 4-Mb SRAM with a new cell structure, where the drain regions of driver transistors form gate electrodes for TFTs. The 4-Mb SRAM was successfully fabricated, verifying the feasibility and validity of the TFT technology