Investigation of reliability and security of the 3D packaging structure

Abstract

Security of chips is the cornerstone of the hardware security and has drawn significant attention. With booming development of advanced packaging, it has provided a new approach to protect chips and the concept of "security packaging of ICs" has been proposed recently. In this paper, security packaging of chips was fully investigated. And, then, our attention was paid on 3D packaging, which offers many new opportunities to chip security mechanism. Additionally, reliability is an important concern in 3D packaging and has inherent relationship with security design. Therefore, reliability and security were discussed together and treated in a holistic manner. To be specific, the reliability and security property of the power distribution network (PND) of 3D packaging was investigated and verified by experiment.