{"title":"Compacting output responses containing unknowns using an embedded processor","authors":"Kamran Saleem, Sreenivaas S. Muthyala, N. Touba","doi":"10.1109/DFT.2015.7315154","DOIUrl":null,"url":null,"abstract":"In system-on-chip (SOC) designs, embedded processors are frequently present as part of the functional design and can be used to help test the chip or system by providing a software-based test. Previous work has looked at compacting output responses in software by performing signature analysis using either arithmetic operations or by implementing a multi-input signature register (MISR) in software. However, these approaches cannot be used when the output response contains unknown (X) values. While it is possible to precisely mask all X's present in the output response in software, a straightforward approach would require a very large amount of mask data to specify which bits to mask. This paper proposes an efficient method for compacting output responses with X's in software using the concept of canceling X's from signatures as proposed in [Touba 07], Whereas the efficiency of the hardware implementation in [Touba 07] is constrained by needing to minimize the hardware overhead, in software these constraints are not present. Thus, a novel and more efficient implementation is proposed here. Moreover, the efficiency is further improved by incorporating a low cost partial X-masking step in software as well. Results indicate that output responses with significant X densities can be very efficiently compacted using the proposed software-based scheme.","PeriodicalId":383972,"journal":{"name":"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFT.2015.7315154","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In system-on-chip (SOC) designs, embedded processors are frequently present as part of the functional design and can be used to help test the chip or system by providing a software-based test. Previous work has looked at compacting output responses in software by performing signature analysis using either arithmetic operations or by implementing a multi-input signature register (MISR) in software. However, these approaches cannot be used when the output response contains unknown (X) values. While it is possible to precisely mask all X's present in the output response in software, a straightforward approach would require a very large amount of mask data to specify which bits to mask. This paper proposes an efficient method for compacting output responses with X's in software using the concept of canceling X's from signatures as proposed in [Touba 07], Whereas the efficiency of the hardware implementation in [Touba 07] is constrained by needing to minimize the hardware overhead, in software these constraints are not present. Thus, a novel and more efficient implementation is proposed here. Moreover, the efficiency is further improved by incorporating a low cost partial X-masking step in software as well. Results indicate that output responses with significant X densities can be very efficiently compacted using the proposed software-based scheme.