High fan-in circuit design

Abstract

A review of high fan-in circuit design in contemporary logic technologies is presented. This is followed by a description of a BiNMOS circuit structure which allows the construction of large fan-in, dynamic logical NAND or OR functions. Power and reliability considerations such as BJT reverse V/sub be/ and MOS hot electron protection are included. Application of the circuit in the 3.3 V, 100 MHz, implementation of the Pentium Microprocessor on a 0.6 mm BiNMOS process is discussed.