Verification of analog and mixed signal designs using online monitoring

Zhiwei Wang, Naeem Abbasi, Rajeev Narayanan, M. Zaki, G. Al Sammane, S. Tahar
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引用次数: 12

Abstract

Analog and mixed signal (AMS) circuits play an important role in today's System on Chip design. They pose, however, many challenges in the verification of the overall system due to their complex behavior. Among many developed verification techniques, runtime verification has been shown to be effective by experimenting finite executions instead of going through the whole state space. In this paper, we present a methodology for the specification and verification of AMS designs using online monitoring at runtime based on the notion of System of Recurrence Equations (SREs). We implement the proposed methodology in a C language based tool, called C-SRE, and utilize it to verify several properties of a PLL design. We compare our proposed online monitoring techniques with the offline approach. Finally, we apply the proposed methodology to monitor the jitter noise associated with a voltage controlled oscillator.
利用在线监测验证模拟和混合信号设计
模拟和混合信号(AMS)电路在当今的片上系统设计中起着重要的作用。然而,由于它们的复杂行为,它们在整个系统的验证中提出了许多挑战。在许多已开发的验证技术中,运行时验证通过试验有限的执行而不是遍历整个状态空间来证明是有效的。在本文中,我们提出了一种基于递归方程系统(SREs)概念的运行时在线监测AMS设计的规范和验证方法。我们在基于C语言的工具中实现了所提出的方法,称为C- sre,并利用它来验证锁相环设计的几个属性。我们比较了我们提出的在线监测技术与离线方法。最后,我们应用所提出的方法来监测与压控振荡器相关的抖动噪声。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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