Design / technology co-optimization of strain-induced layout effects in 14nm UTBB-FDSOI CMOS: Enablement and assessment of continuous-RX designs

R. Berthelon, F. Andrieu, E. Josse, R. Bingert, O. Weber, E. Serret, A. Aurand, S. DelMedico, V. Farys, C. Bernicot, E. Béchet, É. Bernard, T. Poiroux, D. Rideau, P. Scheer, E. Baylac, P. Perreau, M. Jaud, J. Lacord, E. Petitprez, A. Pofelski, S. Ortolland, P. Sardin, D. Dutartre, A. Claverie, M. Vinet, J. Marin, M. Haond
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引用次数: 10

Abstract

We report on the main local layout effect in 14nm Ultra-Thin Buried oxide and Body Fully Depleted Silicon On Insulator (UTBB-FDSOI) CMOS technology [1]. This effect is demonstrated by Nano-Beam Diffraction to be directly induced by the strain in the SiGe channel and reproduced by an accurate electrical compact model. An original continuous-RX design optimizes the stress management, maintaining longitudinal stress component while relaxing the transverse one. A 28% ring oscillator delay improvement is experimentally demonstrated at same leakage for 1-finger inverter at VDD=0.8V supply voltage and a frequency gain up to 15% is simulated in a critical path of an A9 core.
14nm UTBB-FDSOI CMOS应变诱导布局效应的设计/技术协同优化:连续rx设计的实现和评估
我们报道了14nm超薄埋藏氧化物和体上全贫硅绝缘体(UTBB-FDSOI) CMOS技术的主要局部布局效应[1]。纳米束衍射证明了这种效应是由SiGe通道中的应变直接引起的,并通过精确的电致密模型再现了这种效应。原始的连续rx设计优化了应力管理,保持了纵向应力分量,同时放松了横向应力分量。实验证明,在VDD=0.8V电源电压下,1指逆变器在相同漏频情况下,环形振荡器延迟改善28%,并在A9核心的关键路径上模拟了高达15%的频率增益。
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