A case study of the test development for the 2nd generation ColdFire/sup R/ microprocessors

Abstract

A case study of the development of the design for test methodology of the second generation of the ColdFire/sup R/ Microprocessor Family is described from the viewpoint of goals, initial strategy and implementation. Methodology includes at-speed scan path design, path delay testing, I/sub DDQ/ and direct access test modes for embedded memories. Scan tests are applied with timing identical to that specified for peak performance normal operation.