Compound semiconductors on silicon for future generation VLSI

Abstract

The superior electron mobility and velocity offered by compound semiconductors makes them attractive materials to fill the performance gap expected between strained Si and the product requirements for high performance with low power. The heterointegration of these materials on a silicon platform using a VLSI compatible process flow is necessary for cost effectiveness and manufacturability. This paper demonstrates a planar hetero-buffer integration scheme, with mobility of 8000 cm2/Vs - approaching the mobility of homo-integrated HEMTs on InP substrates. Devices were fabricated on a 200 mm substrate using a fully VLSI compatible process flow with a state of the art Si toolset. The encouraging device performance and excellent uniformity demonstrates that III–V can be integrated in a standard Si VLSI production line.