A double-polysilicon self-aligned npn bipolar process (ADRF) with optional NMOS transistors for RF and microwave applications

Abstract

A silicon bipolar process for RF and microwave applications, which features 25-GHz double-polysilicon self-aligned npn bipolar transistors with 5.5-V BV/sub CEO/, optional 0.7-/spl mu/m NMOS transistors with p/sup +/ polysilicon gate for switch applications, lateral pnp transistors, high and low valued resistors, and p/sup +/ polysilicon-to-n/sup +/ plug capacitors, is described. The npn transistors utilize nitride-oxide composite spacers formed using sacrificial TEOS spacers. The RF and microwave capabilities of the process up to several GHz are demonstrated by fabricating and characterizing RF amplifiers, low noise amplifiers, and RF switches.