{"title":"Quality soc design and implementation for real manufacturability","authors":"S. Kohyama","doi":"10.1109/ISQED.2003.1194703","DOIUrl":null,"url":null,"abstract":"Device miniaturization near 100nm node and beyond together with extreme multi-level interconnect started to create fundamental economical and engineering challenges. Especially, past success model of “Layer Masters” confessed difficulties to fill the gaps between each separated layers to complete integrated results, for meeting performance and yield with a reasonable timing. However, it is also obvious that classic IDM model proved to be so inefficient, since inevitable separation and standardization of various aspects of design and technology are not established adequately. Those issues are even more significant when we discuss complex SoC’s for 90nm and 65nm nodes, where design and implementation commingle in various different manners. A solution for these challenges is a new open IDM model where open collaboration and strong differentiator are essential. This presentation will discuss from a “SoC centric Open IDM” perspective, the whole flow of design and implementation for real manufacturability, where true knowledge of integration and management skill function to enhance differentiators on top of open platforms.","PeriodicalId":448890,"journal":{"name":"Fourth International Symposium on Quality Electronic Design, 2003. Proceedings.","volume":"16 5","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Fourth International Symposium on Quality Electronic Design, 2003. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2003.1194703","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Device miniaturization near 100nm node and beyond together with extreme multi-level interconnect started to create fundamental economical and engineering challenges. Especially, past success model of “Layer Masters” confessed difficulties to fill the gaps between each separated layers to complete integrated results, for meeting performance and yield with a reasonable timing. However, it is also obvious that classic IDM model proved to be so inefficient, since inevitable separation and standardization of various aspects of design and technology are not established adequately. Those issues are even more significant when we discuss complex SoC’s for 90nm and 65nm nodes, where design and implementation commingle in various different manners. A solution for these challenges is a new open IDM model where open collaboration and strong differentiator are essential. This presentation will discuss from a “SoC centric Open IDM” perspective, the whole flow of design and implementation for real manufacturability, where true knowledge of integration and management skill function to enhance differentiators on top of open platforms.