Neuron-MOS binary-logic circuits featuring dramatic reduction in transistor count and interconnections

Abstract

We have developed a new binary-logic circuit scheme in which a highly-functional device called a neuron MOS transistor (vMOS) is utilized as a key component. A dramatic reduction in the number of transistors as well as in the complexity of interconnections has been achieved by the new circuit configuration using vMOS. Operational principles and design techniques of vMOS binary-logic circuits are described. The operation of the designed circuits has been experimentally verified by fabricating test circuits using a standard double-polysilicon CMOS process.<>