Challenges and countermeasure of strip form reflow screening process for flip chip QFN and module package

Lim Ming Siong, Gan Tek Keong, W. C. Way
{"title":"Challenges and countermeasure of strip form reflow screening process for flip chip QFN and module package","authors":"Lim Ming Siong, Gan Tek Keong, W. C. Way","doi":"10.1109/EPTC.2015.7412422","DOIUrl":null,"url":null,"abstract":"Solder joint robustness is a major challenge in flip chip packaging. Poor wetting and solder joint crack are the most common manufacturing defects which usually lead to product functional and reliability failure. The risk level is elevated whereby failure is occurred intermittently and only become permanent during SMT process at customer application where thermal mechanical stress induced. The conventional manufacturing quality controls are always applied which include visual inspection during and after die bond, x-ray after encapsulation and tighten test limit. However such controls are not able to screen out all defects effectively especially intermittent failure. Nowadays, reflow screening process has become common in semiconductor packaging as many semiconductor manufacturers found technically that above defects can be aggravated to certain degrees which finally fail during electrical testing. Reflow screening process is widely known to be requirement especially in automotive product's customer. However, we are seeing increasing numbers of consumer product's customer like mobile phone (Samsung) demanded reflow as a mandatory process at all their semiconductor component supplier. Form of semiconductor component undergo reflow become very critical especially miniature package size of QFN which the smallest size down to 1.0mm × 0.6mm × 0.36mm. It is impossible to perform reflow screening process in singulated-unit form base on today test platform limitation. On the other hand, strip form reflow face multiple manufacturing challenges especially for thin Cu lead-frame or premold lead-frame. This paper is to discuss the challenges and countermeasure to setup and implement strip form reflow screening process. High temperature applied during reflow may contribute to SMT pad oxidation or contamination. Influence of pad finishing eg Au / Sn pad might subsequently lead to solder-ability risk. Thus, reflow before plating is proposed. However, during setting up of reflow process, high non-plate rejects (~50%) was encountered on Electroless Nickel Immersion Gold (ENIG) plating package. TGA and FTIR were performed to reveal the hypothesis of decomposition of the mold compound wax to form carbonyl group (-C=O) and subsequently deposited on the SMT pad. Reflow after plating is applied on ENIG package with assessment on solder ability test to mitigate the risk. Due to CTE mismatch of mold compound and base material in strip form, different level of strip deformation which include coil set, crossbow and strip shrinkage were observed for different packages. High strip deformation not only brings to quality concern such as panel crack, bubble trapped, offset saw, panel shrinkage, also at the same time giving difficulties in both lamination and package sawing manufacturing process. Optimizing the strip design during reflow, which including splitting of the strip form to array form and removal of strip metal reel show significant different in strip deformation especially on module package (substrate base). On the other hand, optimizing reflow temperature profile to counter strip deformation, at the same time, maintaining the screening effectiveness is performed and analyzed. Detail reflow jig or carrier design, which consist feature of preventing the strip deformation due to thermal stress while inducing minimal mechanical stress is studied and assessed. The influence of reflow jig heat mass to the overall temperature profile is also discussed and evaluated.","PeriodicalId":418705,"journal":{"name":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2015.7412422","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

Solder joint robustness is a major challenge in flip chip packaging. Poor wetting and solder joint crack are the most common manufacturing defects which usually lead to product functional and reliability failure. The risk level is elevated whereby failure is occurred intermittently and only become permanent during SMT process at customer application where thermal mechanical stress induced. The conventional manufacturing quality controls are always applied which include visual inspection during and after die bond, x-ray after encapsulation and tighten test limit. However such controls are not able to screen out all defects effectively especially intermittent failure. Nowadays, reflow screening process has become common in semiconductor packaging as many semiconductor manufacturers found technically that above defects can be aggravated to certain degrees which finally fail during electrical testing. Reflow screening process is widely known to be requirement especially in automotive product's customer. However, we are seeing increasing numbers of consumer product's customer like mobile phone (Samsung) demanded reflow as a mandatory process at all their semiconductor component supplier. Form of semiconductor component undergo reflow become very critical especially miniature package size of QFN which the smallest size down to 1.0mm × 0.6mm × 0.36mm. It is impossible to perform reflow screening process in singulated-unit form base on today test platform limitation. On the other hand, strip form reflow face multiple manufacturing challenges especially for thin Cu lead-frame or premold lead-frame. This paper is to discuss the challenges and countermeasure to setup and implement strip form reflow screening process. High temperature applied during reflow may contribute to SMT pad oxidation or contamination. Influence of pad finishing eg Au / Sn pad might subsequently lead to solder-ability risk. Thus, reflow before plating is proposed. However, during setting up of reflow process, high non-plate rejects (~50%) was encountered on Electroless Nickel Immersion Gold (ENIG) plating package. TGA and FTIR were performed to reveal the hypothesis of decomposition of the mold compound wax to form carbonyl group (-C=O) and subsequently deposited on the SMT pad. Reflow after plating is applied on ENIG package with assessment on solder ability test to mitigate the risk. Due to CTE mismatch of mold compound and base material in strip form, different level of strip deformation which include coil set, crossbow and strip shrinkage were observed for different packages. High strip deformation not only brings to quality concern such as panel crack, bubble trapped, offset saw, panel shrinkage, also at the same time giving difficulties in both lamination and package sawing manufacturing process. Optimizing the strip design during reflow, which including splitting of the strip form to array form and removal of strip metal reel show significant different in strip deformation especially on module package (substrate base). On the other hand, optimizing reflow temperature profile to counter strip deformation, at the same time, maintaining the screening effectiveness is performed and analyzed. Detail reflow jig or carrier design, which consist feature of preventing the strip deformation due to thermal stress while inducing minimal mechanical stress is studied and assessed. The influence of reflow jig heat mass to the overall temperature profile is also discussed and evaluated.
倒装QFN和模块封装的带形回流筛选工艺挑战及对策
焊点的坚固性是倒装芯片封装的主要挑战。润湿不良和焊点裂纹是最常见的制造缺陷,通常会导致产品的功能和可靠性失效。由于故障是间歇性发生的,只有在客户应用的SMT过程中,热机械应力引起的故障才会成为永久性的,因此风险水平会提高。传统的制造质量控制包括模具粘合期间和之后的目视检查,封装后的x射线检查和拧紧测试极限。然而,这种控制不能有效地筛选出所有的缺陷,特别是间歇性故障。如今,回流筛选工艺在半导体封装中已经变得很普遍,因为许多半导体制造商从技术上发现,上述缺陷可能会加剧到一定程度,最终在电气测试中失败。回流筛分工艺是汽车产品客户普遍要求的工艺。然而,我们看到越来越多的消费产品客户,如手机(三星)要求回流作为其所有半导体元件供应商的强制性流程。半导体元件的回流形式变得非常关键,特别是QFN的微型化封装尺寸,其最小尺寸可达1.0mm × 0.6mm × 0.36mm。在现有试验平台的限制下,不可能以单机形式进行回流筛选。另一方面,条形回流面临着多种制造挑战,特别是薄铜引线框架或预模引线框架。本文讨论了建立和实施带钢回流筛分工艺所面临的挑战和对策。回流过程中施加的高温可能导致SMT焊盘氧化或污染。焊盘表面处理的影响(例如Au / Sn焊盘)可能随后导致焊接性风险。因此,建议在电镀前进行回流。然而,在回流工艺的建立过程中,化学镀镍浸金(ENIG)封装遇到了很高的非板废品率(~50%)。通过热重分析和红外光谱分析,揭示了模具化合物蜡分解形成羰基(-C=O)并沉积在SMT焊盘上的假设。ENIG封装采用电镀后回流焊,并进行焊接性测试评估,以降低风险。由于模具复合材料与基材在带材形式上的CTE不匹配,不同包装的带材变形程度不同,包括卷板、弓形和带材收缩。带材变形大不仅给板材带来了裂纹、气泡困、偏锯、板材收缩等质量问题,同时也给层压和包切制造工艺带来了困难。在回流过程中优化带材设计,将带材形式拆分为阵列形式,去除带材金属卷筒,对带材变形有显著影响,特别是在模块封装(基板底座)上。另一方面,优化回流温度分布以抑制带钢变形,同时保持筛分效果。研究和评价了既能防止带材因热应力而变形,又能产生最小机械应力的回流夹具或载体的详细设计。讨论并评价了回流跳汰机热质量对整体温度分布的影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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