{"title":"Challenges and countermeasure of strip form reflow screening process for flip chip QFN and module package","authors":"Lim Ming Siong, Gan Tek Keong, W. C. Way","doi":"10.1109/EPTC.2015.7412422","DOIUrl":null,"url":null,"abstract":"Solder joint robustness is a major challenge in flip chip packaging. Poor wetting and solder joint crack are the most common manufacturing defects which usually lead to product functional and reliability failure. The risk level is elevated whereby failure is occurred intermittently and only become permanent during SMT process at customer application where thermal mechanical stress induced. The conventional manufacturing quality controls are always applied which include visual inspection during and after die bond, x-ray after encapsulation and tighten test limit. However such controls are not able to screen out all defects effectively especially intermittent failure. Nowadays, reflow screening process has become common in semiconductor packaging as many semiconductor manufacturers found technically that above defects can be aggravated to certain degrees which finally fail during electrical testing. Reflow screening process is widely known to be requirement especially in automotive product's customer. However, we are seeing increasing numbers of consumer product's customer like mobile phone (Samsung) demanded reflow as a mandatory process at all their semiconductor component supplier. Form of semiconductor component undergo reflow become very critical especially miniature package size of QFN which the smallest size down to 1.0mm × 0.6mm × 0.36mm. It is impossible to perform reflow screening process in singulated-unit form base on today test platform limitation. On the other hand, strip form reflow face multiple manufacturing challenges especially for thin Cu lead-frame or premold lead-frame. This paper is to discuss the challenges and countermeasure to setup and implement strip form reflow screening process. High temperature applied during reflow may contribute to SMT pad oxidation or contamination. Influence of pad finishing eg Au / Sn pad might subsequently lead to solder-ability risk. Thus, reflow before plating is proposed. However, during setting up of reflow process, high non-plate rejects (~50%) was encountered on Electroless Nickel Immersion Gold (ENIG) plating package. TGA and FTIR were performed to reveal the hypothesis of decomposition of the mold compound wax to form carbonyl group (-C=O) and subsequently deposited on the SMT pad. Reflow after plating is applied on ENIG package with assessment on solder ability test to mitigate the risk. Due to CTE mismatch of mold compound and base material in strip form, different level of strip deformation which include coil set, crossbow and strip shrinkage were observed for different packages. High strip deformation not only brings to quality concern such as panel crack, bubble trapped, offset saw, panel shrinkage, also at the same time giving difficulties in both lamination and package sawing manufacturing process. Optimizing the strip design during reflow, which including splitting of the strip form to array form and removal of strip metal reel show significant different in strip deformation especially on module package (substrate base). On the other hand, optimizing reflow temperature profile to counter strip deformation, at the same time, maintaining the screening effectiveness is performed and analyzed. Detail reflow jig or carrier design, which consist feature of preventing the strip deformation due to thermal stress while inducing minimal mechanical stress is studied and assessed. The influence of reflow jig heat mass to the overall temperature profile is also discussed and evaluated.","PeriodicalId":418705,"journal":{"name":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2015.7412422","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Solder joint robustness is a major challenge in flip chip packaging. Poor wetting and solder joint crack are the most common manufacturing defects which usually lead to product functional and reliability failure. The risk level is elevated whereby failure is occurred intermittently and only become permanent during SMT process at customer application where thermal mechanical stress induced. The conventional manufacturing quality controls are always applied which include visual inspection during and after die bond, x-ray after encapsulation and tighten test limit. However such controls are not able to screen out all defects effectively especially intermittent failure. Nowadays, reflow screening process has become common in semiconductor packaging as many semiconductor manufacturers found technically that above defects can be aggravated to certain degrees which finally fail during electrical testing. Reflow screening process is widely known to be requirement especially in automotive product's customer. However, we are seeing increasing numbers of consumer product's customer like mobile phone (Samsung) demanded reflow as a mandatory process at all their semiconductor component supplier. Form of semiconductor component undergo reflow become very critical especially miniature package size of QFN which the smallest size down to 1.0mm × 0.6mm × 0.36mm. It is impossible to perform reflow screening process in singulated-unit form base on today test platform limitation. On the other hand, strip form reflow face multiple manufacturing challenges especially for thin Cu lead-frame or premold lead-frame. This paper is to discuss the challenges and countermeasure to setup and implement strip form reflow screening process. High temperature applied during reflow may contribute to SMT pad oxidation or contamination. Influence of pad finishing eg Au / Sn pad might subsequently lead to solder-ability risk. Thus, reflow before plating is proposed. However, during setting up of reflow process, high non-plate rejects (~50%) was encountered on Electroless Nickel Immersion Gold (ENIG) plating package. TGA and FTIR were performed to reveal the hypothesis of decomposition of the mold compound wax to form carbonyl group (-C=O) and subsequently deposited on the SMT pad. Reflow after plating is applied on ENIG package with assessment on solder ability test to mitigate the risk. Due to CTE mismatch of mold compound and base material in strip form, different level of strip deformation which include coil set, crossbow and strip shrinkage were observed for different packages. High strip deformation not only brings to quality concern such as panel crack, bubble trapped, offset saw, panel shrinkage, also at the same time giving difficulties in both lamination and package sawing manufacturing process. Optimizing the strip design during reflow, which including splitting of the strip form to array form and removal of strip metal reel show significant different in strip deformation especially on module package (substrate base). On the other hand, optimizing reflow temperature profile to counter strip deformation, at the same time, maintaining the screening effectiveness is performed and analyzed. Detail reflow jig or carrier design, which consist feature of preventing the strip deformation due to thermal stress while inducing minimal mechanical stress is studied and assessed. The influence of reflow jig heat mass to the overall temperature profile is also discussed and evaluated.