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Small Array Area, Memory Error Tolerant ReRAM Computation-in-Memory with Log-encoding Simulated Annealing for Combinational Optimization Problems

Extended Abstracts of the 2021 International Conference on Solid State Devices and Materials Pub Date : 2021-09-08 DOI:10.7567/ssdm.2021.b-5-02
Naoko Misawa, Kenta Taoka, C. Matsui, Ken Takeuchi
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小阵列面积，存储器容错ReRAM -内存计算与对数编码模拟退火组合优化问题
本文章由计算机程序翻译，如有差异，请以英文原文为准。
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Extended Abstracts of the 2021 International Conference on Solid State Devices and Materials
Extended Abstracts of the 2021 International Conference on Solid State Devices and Materials
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