Electrical properties of MOCVD HfO/sub 2/ dielectric layers with polysilicon gate electrodes for CMOS applications

Abstract

Electrical properties of MOS capacitors using MOCVD HfO/sub 2/ as gate dielectric have been investigated. A 900/spl deg/C 1s activation anneal of Ph-doped 680/spl deg/C-RTCVD demonstrated a good compatibility with high-k layers. The best MOS capacitor is obtained with EOT=1.93 nm and Jg = 1.6E-04 A/cm/sup 2/ at |V/sub FB/-1| which is > 2 orders of magnitude lower than SiO/sub 2/ with poly-Si gate. A minimal degradation of leakage current after 900/spl deg/C activation anneal and low effect of temperature dependence reveal the thermal stability of MOCVD HfO/sub 2/ gate stack. Nevertheless, upon 1000/spl deg/C activation anneal only the LPCVD poly resulted in working MOS capacitor. The found leakage current was > 2 order of magnitude higher compared to a 900/spl deg/C activation anneal.