S. Kojima, Y. Arai, Tasuku Fujibe, T. Ataka, A. Ono, Ken-ichi Sawada, D. Watanabe
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引用次数: 5
Abstract
In this paper, we present a small sized CMOS pin-electronics hardware macro applicable to 8Gbps real-time functional testing. The macro includes a driver, comparators, DACs, and control logic embedded within an area of size 2mm × 1.6mm. As the macro is implemented on a 65nm standard CMOS process, it can be implemented together with pattern generators and timing generators to realize a single chip pin electronics solution. Moreover, the macro is capable of simultaneous bi-directional (SBD) signaling, which greatly reduces test time. A simple and reliable method to evaluate SBD is also discussed. We have applied our macro to a test chip to prove that the macro is applicable to an 8Gbps test system.