Board level reliability testing of /spl mu/BGA/sup (R)/ packaging with lead-free solder attachment

V. Solberg
{"title":"Board level reliability testing of /spl mu/BGA/sup (R)/ packaging with lead-free solder attachment","authors":"V. Solberg","doi":"10.1109/EPTC.2000.906342","DOIUrl":null,"url":null,"abstract":"To maximize the benefit of chip-scale packaging for portable and handheld electronics, the user must consider efficient and cost effective assembly processing. Factors that an engineer should review before developing the product using CSP may include physical features and construction of the device, environmental limitations, suitable substrate materials and a general understanding of the attachment methodology. Many of the electronic products being developed using miniature chip-scale packages are moving toward lead-free, environmentally safe assembly processes. This paper reviews chip-size flash and RAMBUS memory test device applications utilizing /spl mu/BGA/sup (R)/ package technology, explore alternative solder alloy compositions, furnish recommendations for solder process temperature profiles and present the results from extensive thermal cycle testing, comparing eutectic solder to lead-free solder ball contacts and attachment materials.","PeriodicalId":430941,"journal":{"name":"Proceedings of 3rd Electronics Packaging Technology Conference (EPTC 2000) (Cat. No.00EX456)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 3rd Electronics Packaging Technology Conference (EPTC 2000) (Cat. No.00EX456)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2000.906342","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

To maximize the benefit of chip-scale packaging for portable and handheld electronics, the user must consider efficient and cost effective assembly processing. Factors that an engineer should review before developing the product using CSP may include physical features and construction of the device, environmental limitations, suitable substrate materials and a general understanding of the attachment methodology. Many of the electronic products being developed using miniature chip-scale packages are moving toward lead-free, environmentally safe assembly processes. This paper reviews chip-size flash and RAMBUS memory test device applications utilizing /spl mu/BGA/sup (R)/ package technology, explore alternative solder alloy compositions, furnish recommendations for solder process temperature profiles and present the results from extensive thermal cycle testing, comparing eutectic solder to lead-free solder ball contacts and attachment materials.
电路板级可靠性测试/spl mu/BGA/sup (R)/封装无铅焊料附件
为了最大限度地提高便携式和手持电子产品的芯片级封装的效益,用户必须考虑高效和具有成本效益的组装加工。在使用CSP开发产品之前,工程师应该审查的因素可能包括设备的物理特性和结构、环境限制、合适的基板材料以及对附件方法的一般理解。许多使用微型芯片级封装开发的电子产品正朝着无铅、环保的组装工艺发展。本文回顾了采用/spl mu/BGA/sup (R)/封装技术的芯片尺寸闪存和RAMBUS存储器测试设备的应用,探索了可替代的焊锡合金成分,提出了焊锡工艺温度曲线的建议,并介绍了广泛的热循环测试的结果,比较了共晶焊锡与无铅焊锡球触点和附件材料。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信