Constant impedance scaling paradigm for scaling LC transmission lines

Abstract

Reverse scaled LC transmission lines are an effective alternative to on-chip global interconnects which severely limit the chip performance in nano-CMOS technologies. However, the main disadvantage of the LC transmission line approach is their poor wiring density. The scaling of LC transmission lines is formally analyzed with the proposed constant impedance scaling paradigm that simultaneously maximize performance and wiring density. With this paradigm, we show that the LC transmission line implementation would need a minimum pitch of 8mum for line lengths in the range of 10 to 20 mm, considering a low-k dielectric of relative dielectric constant of 2.7