New power delivery scheme for 3D ICs to minimize simultaneous switching noise for high speed I/Os

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI:10.1109/EPEPS.2012.6457849

D. C. Zhang, M. Swaminathan, S. Huh

引用次数: 8

Abstract

Simultaneous switching noise is a detrimental issue in high speed digital systems. In this paper, we utilize power transmission line based design and current steering to minimize power supply noise, eye height and jitter penalties.

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新的3D ic供电方案，最大限度地减少高速I/ o的同时开关噪声

同时开关噪声是高速数字系统中的一个严重问题。在本文中，我们利用基于输电线路的设计和电流转向来最小化电源噪声，眼高度和抖动惩罚。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems

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