Investigation Regarding Thermal Resistance of Surface Mount Type Discrete Power Semiconductor Package

Abstract

Power electronics is becoming more important than before with motor application expansion. For size reduction of inverter integrated motor design, accurate temperature prediction of power devices is becoming critical. For up to several hundred-watt motor system, inverter is designed with discrete power devices with standard package. This paper investigates package thermal resistance of a DPAK package as an example. Firstly, three-dimensional heat conduction simulation only with DPAK package model is conducted. It is found that its package thermal resistance changes by ∼6.2°C/W due to boundary condition variation. After that, simulation not only with DPAK package but also with PCB is conducted to understand package thermal resistance of a real system implementation case. It is found that package thermal resistance varies drastically by copper trace size. “Smallest” case with minimum copper traces shows ∼0.9 °C/W higher value than larger copper trace case and shows ∼1.5 °C/W higher value than the case that copper trace fully covers PCB top surface, in the case that horizontal PCB size is 50 × 50 mm. After that, two types of test boards with different trace size for of n-channel MOSFET with DPAK package are prepared. Measurements are conducted to know package thermal resistance variation by copper trace size. Transient thermal impedance curve is obtained from measurement result and is converted to a cumulative Rth-Cth curve to know and discuss the difference by copper trace size of these two test boards. The difference is also discussed with and compared to that of simulation results.