A transceiver 10GBase-T in 90nm CMOS

Abstract

This work presents a single channel (cable) prototype lOGBase-T transceiver fabricated in a 90nm CMOS process. A 1.2V/3.3V dual supply is used. The transmitter, consuming 93.7mW, features a class- AB line driver using an AC coupled bias and a common-mode (CM) compensation capacitor transparent to the differential-mode (DM) path to achieve high efficiency. It achieves 59.51dB SFDR for a test signal at 30MHz. The receiver, consuming 24mW, features a PGA using a two-stage cascode Miller compensated op-amp and a multiple feedback low-pass filter. It achieves 59.7dB SFDR for a test signal at 100MHz. The total chip area is 1.7*1.36 mm2.