Simulation and optimization of interconnect delay and crosstalk in multi-chip modules

Abstract

As signal speeds increase, interconnect effects such as delay, distortion and crosstalk become the dominant factor limiting the overall performance of a multichip module. The authors outline efficient techniques recently developed for addressing three specific aspects of the high-speed interconnect problem, namely, simulation, sensitivity analysis and performance optimization. These techniques accommodate distributed interconnect models represented by lossy coupled transmission lines. Two examples showing the applications of these techniques are included.<>