An Efficient Field-Partition Based Code Compression and Its Pipelined Decompression System

2006 International Symposium on VLSI Design, Automation and Test Pub Date : 2006-04-26 DOI:10.1109/VDAT.2006.258133

Y. Jeang, Yong Lin

引用次数: 4

Abstract

A field partition based instruction compression/decompression system for ARM series architecture is proposed. Due to a high degree of repetition in the encoding of the specific fields of the instructions in a program, we could get a statistics of the appearances of each field in all instructions of a program. Depending on the statistics, we partition each instruction into three fields and compress each field using Huffman coding method. Experimental results show that our method is better than others with a 55% of average compression ratio. For decompression, single buffering, double buffering and pipeline techniques have been proposed. However, due to jump penalty, these techniques incur more delays in pipeline or have to stop and fill in the cache buffers. We proposed a pipeline with back-up for flushing technique that incurs no delay and without stopping due to jump. The average performance is increased about 10% to 60%

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一种高效的基于域划分的代码压缩及其流水线解压缩系统

提出了一种基于字段分区的ARM系列指令压缩/解压缩系统。由于程序中指令的特定字段的编码高度重复，我们可以统计出程序中所有指令中每个字段的出现情况。根据统计数据，我们将每条指令划分为三个字段，并使用霍夫曼编码方法对每个字段进行压缩。实验结果表明，该方法的压缩比为平均压缩比的55%，优于其他方法。对于减压，提出了单缓冲、双缓冲和管道技术。然而，由于跳转惩罚，这些技术会导致更多的管道延迟或不得不停止并填充缓存缓冲区。我们提出了一种带有备用冲洗技术的管道，该技术不会产生延迟，也不会因跳跃而停止。平均性能提高10% ~ 60%

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2006 International Symposium on VLSI Design, Automation and Test

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