Thermal modeling of diamond-based power electronics packaging

Abstract

Finite element modeling suggests that the thermal performance of plastic and ceramic packages could be significantly improved through the insertion of CVD diamond substrates. The model was formulated by considering the thermal properties, dimensions, and spatial locations of the materials comprising the dominant conductive thermal path. Optimized designs were selected, targeting the minimization of die junction temperature, package maximum temperature, and package temperature gradients through the reduction of the heat source to heat sink thermal resistance. Selected designs were fabricated and thermally evaluated using infrared thermometry. Diamond-enhanced package designs using leadframe-substrate "overlaps" for plastic SOIC packages and through-flange "inserts" for ceramic power packages realized junction temperature decreases of greater than 50%.