Low power mode and IEEE 1149.1 compliance: a low power solution

Abstract

The requirements of a low power mode, built into complex VLSI IC's such as microprocessors, seem to conflict with the IEEE 1149.1 Standard (JTAG). The perception that the TAP Pins-T~R~S~T~, TMS, and TDI-must be equipped with power-consuming pullup resistors or that low power and 1149.1 modes of operation are mutually exclusive is erroneous. Certain techniques can be used during the design and implementation of the TAP and the TAP controller that will allow the IC to enter low power mode without interference or unnecessary power consumption from the JTAG logic and will allow JTAG operations during low power mode while maintaining full compliance to the 1149.1 standard.