H. Mizuta, K. Nakazato, P. Piotrowicz, K. Itoh, T. Teshima, K. Yamaguchi, T. Shimada
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引用次数: 10
Abstract
An advanced Planar Localised Electron Device (PLED) is presented for use as a non-volatile and high-speed random access memory with very low power consumption. A new tunnel barrier configuration is introduced to achieve both write time shorter than 1.0 nsec and retention time over 10 years. An operation scheme based on extremely high ON/OFF current ratios is demonstrated for the first time by conducting numerical simulation of tunnel currents.