Evaluation of thermomechanical behavior of electronic devices through the use of a reduced order modelling approach

M. Weninger, J. Zündel, T. Krivec, M. Frewein, S. Waschnig, P. Fuchs, C. Obst
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引用次数: 1

Abstract

Warpage is an issue in the manufacturing of electronic packages. The main driver for this effect is the mismatch of material properties especially during temperature cycling. To predict warpage before building samples, the FEM (Finite Element Method) is used in this study. PCBs (Printed Circuit Boards) are assembled in array format. Thus the simulation should be done in this format. Studies investigated PCBs thru a detailed representation [1]. However, no studies were found which simulate an array of PCBAs (Assembled PCBs). This is mainly due limitation of the hardware memory. The array of m2x modules in this work is not feasible to be calculation thru a usual modelling approach, even not through cloud computing. Thus this study investigates the use of substructures to overcome the hardware limitations. The array was manufactured and the simulation results were validated by using DIC (Digital Image Correlation). The predicted warpage of the novel modelling approach is well aligned with the measurement results.The establishment of the method for array format warpage assessment significantly decreases the development times for electronic packages, due to the mitigation of reliability risks and thus design cycles.
通过使用降阶建模方法评价电子器件的热力学行为
翘曲是电子封装制造中的一个问题。这种影响的主要驱动因素是材料特性的不匹配,特别是在温度循环期间。为了在构建样品之前预测翘曲,本研究采用了有限元法。pcb(印刷电路板)以阵列的形式组装。因此,模拟应该以这种格式进行。对多氯联苯进行了详细的研究。然而,没有研究发现,模拟阵列的pcb(组装pcb)。这主要是由于硬件内存的限制。本工作中的m2x模块阵列无法通过通常的建模方法进行计算,甚至无法通过云计算进行计算。因此,本研究探讨了利用子结构来克服硬件限制。制作了该阵列,并利用DIC (Digital Image Correlation)技术对仿真结果进行了验证。新建模方法的预测翘曲与测量结果很好地一致。阵列格式翘曲评估方法的建立大大减少了电子封装的开发时间,因为降低了可靠性风险,从而减少了设计周期。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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