ACT: a DFT tool for self-timed circuits

Abstract

This paper presents a Design for Testability (DFT) tool called ACT (Asynchronous Circuit Testing) which uses a partial scan technique to make macro-module based self-timed circuits testable. The ACT tool is the first of its kind for testing macro-module based self-timed circuits. ACT modifies designs automatically to incorporate partial scan and provides a complete path from schematic capture to physical layout. It also has a test generation system to generate vectors for the testable design and to compute fault coverage of the generated tests. The test generation system includes a module for doing critical hazard free test generation using a new 6-valued algebra. ACT has been built around commercial tools from Viewlogic and Cascade. A Viewlogic schematic is used as the design entry point and Cascade tools are used for technology mapping.