T. Matsuoka, S. Kakimoto, T. Nakano, H. Kotaki, S. Hayashida, K. Sugimoto, K. Adachi, S. Morishita, K. Uda, Y. Sato, M. Yamanaka, T. Ogura, J. Takagi
{"title":"Direct tunneling N/sub 2/O gate oxynitrides for low-voltage operation of dual gate CMOSFETs","authors":"T. Matsuoka, S. Kakimoto, T. Nakano, H. Kotaki, S. Hayashida, K. Sugimoto, K. Adachi, S. Morishita, K. Uda, Y. Sato, M. Yamanaka, T. Ogura, J. Takagi","doi":"10.1109/IEDM.1995.499350","DOIUrl":null,"url":null,"abstract":"Dual gate CMOSFETs with high performance were successfully realized by using 2.8 nm N/sub 2/O-oxynitrides as gate dielectrics. Unlike other fabrication procedures, /sup 11/B/sup +/ ions instead of /sup 49/BF/sub 2//sup +/ were implanted into the gate electrodes of PMOSFETs. We demonstrated that boron diffusion through the 2.8 nm-oxynitrides is effectively blocked by the use of RTA. Substrate current due to hot-carrier effects was observed for NMOSFETs with T/sub ox/=2.8 nm and L=0.5 /spl mu/m even below 1 V. Gate-oxide leakage of surface-channel PMOSFETs is lower than that of NMOSFETs because of high barrier height for holes which significantly reduces hole direct tunneling compared with electron direct tunneling.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1995.499350","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
Dual gate CMOSFETs with high performance were successfully realized by using 2.8 nm N/sub 2/O-oxynitrides as gate dielectrics. Unlike other fabrication procedures, /sup 11/B/sup +/ ions instead of /sup 49/BF/sub 2//sup +/ were implanted into the gate electrodes of PMOSFETs. We demonstrated that boron diffusion through the 2.8 nm-oxynitrides is effectively blocked by the use of RTA. Substrate current due to hot-carrier effects was observed for NMOSFETs with T/sub ox/=2.8 nm and L=0.5 /spl mu/m even below 1 V. Gate-oxide leakage of surface-channel PMOSFETs is lower than that of NMOSFETs because of high barrier height for holes which significantly reduces hole direct tunneling compared with electron direct tunneling.