Compact modeling solution of layout dependent effect for FinFET technology

Abstract

We successfully developed and verified a complete compact model solution for layout dependent effect (LDE) of FinFET technology. LDE has significant impact on the device performances mainly due to the application of stressors and aggressive device scaling. With LDE, performance degradation may be up to 10% or more. In this work, compact model solution for Length of Oxidation (LOD), Well Proximity Effect (WPE), Neighboring Diffusion Effect (NDE), Metal Boundary Effect (MBE), and Gate Line End Effect (GLE) were delivered. This solution was implemented successfully in BSIM-CMG for efficient circuit simulation.