Investigation on microstructure and resistivity in Cu-TSVs for 3D packaging

Abstract

The resistivity of Cu-TSV(Through Silicon Via) substantially affects the performance of system LSIs. Hence, it is very important to evaluate the resistivity of Cu-TSV precisely. Researchers and engineers were concerned about the possibility that many impurities from additives and plating solutions were incorporated into Cu-TSV during plating and these impurities would precipitate along the grain boundaries, leading to great scattering in grain sizes from tens of nm to several μm, resulting in resistivity increase after annealing. However, the precise resistivity was not always published up to now. In order to obtain accurate resistivity, we have developed a new TEG(Test Element Group) pattern and its manufacturing process. Using TEGs, we obtained 4.13μΩ·cm as the resistivity of one Cu-TSV. The mechanism of high-resistivity of Cu-TSV was discussed by measuring grain size scattering using X-ray diffraction.