A built-in electrical test circuit for detecting open leads in assembled PCB circuits

Takumi Miyabe, M. Hashizume, H. Yotsuyanagi, Shyue-Kung Lu, Z. Roth
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引用次数: 1

Abstract

In this paper, a built-in electrical test circuit is proposed to detect an open defect at an interconnect between a land on a printed circuit board and an IC. The test circuit is made of an integrating circuit, nMOS switches and a switch control circuit. A time-varying signal generated by the integrating circuit is provided to a targeted interconnect as a stimulus signal in the tests. An input buffer gate in an IC is utilized as an open sensor in the tests. The open defect is detected by means of supply current of the sensor. We examine by Spice simulation whether open defects can be detected by using the test circuit. The results reveal us that an open defect can be detected at a test speed of 50 kHz for each input terminal of an IC.
一种内置的电气测试电路,用于检测组装的PCB电路中的开路引线
本文提出了一种用于检测印刷电路板上电路板与集成电路互连处开路缺陷的内置电气测试电路。该测试电路由集成电路、nMOS开关和开关控制电路组成。在测试中,将由集成电路产生的时变信号作为刺激信号提供给目标互连。在测试中,集成电路中的输入缓冲门用作开放传感器。利用传感器的供电电流检测开路缺陷。我们通过Spice模拟检验了使用测试电路是否可以检测到开路缺陷。结果表明,在50 kHz的测试速度下,可以检测到IC的每个输入端有一个开放缺陷。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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