S. Harb, Emad S. Al-Momani, Bong-Seon Yu, Rajaa Alqudah
{"title":"Socket Signal Integrity Assessment for High Speed LPDDR4 Memory Test Applications","authors":"S. Harb, Emad S. Al-Momani, Bong-Seon Yu, Rajaa Alqudah","doi":"10.1109/EPTC47984.2019.9076717","DOIUrl":null,"url":null,"abstract":"As the data rate of Low Power Double Data Rate 4 (LPDDR4) memory is reaching higher speeds, it is becoming more crucial to evaluate and assess the electrical performance of the viable socket technologies in the market. This paper presents a signal integrity (SI) evaluation for gripper-type pin technology, one of the commercially available socket technologies which potentially can be enabled for high speed LPDDR4 memory test applications with a data transmission rate of up to 2.4 Gb/s. We performed three-dimensional numerical simulations with a commercially available 3D FEM (finite element method)-based full-wave software package (Ansoft HFSS). We evaluated No-Socket vs. Single-Sided gripper socket pins and compared their signal transmission characteristics. Simulation results showed that the worst case margin degradation for the single-sided gripper socket could be improved by reducing the Z-axis height of the socket pin to minimize crosstalk and achieve better performance at higher GHz frequencies.","PeriodicalId":244618,"journal":{"name":"2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC47984.2019.9076717","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
As the data rate of Low Power Double Data Rate 4 (LPDDR4) memory is reaching higher speeds, it is becoming more crucial to evaluate and assess the electrical performance of the viable socket technologies in the market. This paper presents a signal integrity (SI) evaluation for gripper-type pin technology, one of the commercially available socket technologies which potentially can be enabled for high speed LPDDR4 memory test applications with a data transmission rate of up to 2.4 Gb/s. We performed three-dimensional numerical simulations with a commercially available 3D FEM (finite element method)-based full-wave software package (Ansoft HFSS). We evaluated No-Socket vs. Single-Sided gripper socket pins and compared their signal transmission characteristics. Simulation results showed that the worst case margin degradation for the single-sided gripper socket could be improved by reducing the Z-axis height of the socket pin to minimize crosstalk and achieve better performance at higher GHz frequencies.