Intrinsic fluctuations in Vertical NAND flash memories

Abstract

Vertical NAND (VNAND) technology relies on polysilicon for channel material. Two intrinsic variation sources of the cell threshold voltage induced by polysilicon traps have been identified and simulated: Random Trap Fluctuation (RTF) and Random Telegraph Noise (RTN). We demonstrate that RTN is enhanced by the polysilicon material and an original model explains the asymmetric RTN distribution observed after endurance. This work enables the prediction of VT distribution for VNAND devices in MLC operation.