Influence of back-end thermal processing on polysilicon-monosilicon contact resistance due to dopant deactivation

Abstract

The effect of post-planarization rapid thermal anneal (RTA) steps on polysilicon-monosilicon contact resistance is critically dependent on the thermal requirements of the specific planarization technique used. While these RTA steps were found to increase R/sub c,poly/n+/ for chemical mechanical polishing (CMP) type low or zero thermal budget back-end processes, they decreased R/sub c,poly/n+/ when furnace glass reflow anneals were used. For a CMP back-end process when a high temperature (/spl ges/1000/spl deg/C) RTA is used to form the shallow n/sup +/ emitter junction, all subsequent anneals need to be carefully optimized to avoid drastic increases in R/sub c,poly/n+/-for a 1065/spl deg/C emitter RTA and 850/spl deg/C RTA process, a 700/spl deg/C RTA caused a 62% increase for a 30 sec anneal and a 125% increase for a 300 sec anneal.