Gold-doped high resistivity Czochralski-silicon for integrated passive devices and 3D integration

A. Abuelgasim, Kanad Mallik, C. D. de Groot, P. Ashburn
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引用次数: 1

Abstract

We show that deep level doping of Czochralski-grown silicon wafers is capable of providing very high resistivity wafers suitable for integrated passive devices and 3D integration. Starting from n-type Czochralski silicon wafers having a nominal resistivity of 50 Ωcm, we use Au ion implantation to increase the resistivity. Coplanar waveguides fabricated on the wafers show strongly reduced attenuation. Hall measurements indicate that the increase in resistivity is clearly due to a reduction in free carriers. The temperature dependence of the free carrier concentration in the range of 200–350K indicates that the Fermi-level is virtually pinned mid-gap.
用于集成无源器件和三维集成的金掺杂高电阻率czochralski硅
我们证明了深层掺杂的czochralski生长硅片能够提供非常高电阻率的硅片,适合集成无源器件和3D集成。我们从标称电阻率为50 Ωcm的n型奇克拉尔斯基硅片开始,采用Au离子注入提高其电阻率。在晶圆上制作的共面波导显示出明显的衰减。霍尔测量表明,电阻率的增加显然是由于自由载流子的减少。在200 ~ 350k范围内,自由载流子浓度的温度依赖性表明费米能级实际上被固定在间隙中。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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