Impact of HK / MG stacks and future device scaling on RTN

Abstract

This work demonstrates the close relationship between device scaling and the threshold voltage variation (ΔVth) of random telegraph noise (RTN) in high-κ and metal gate (HK / MG) stacks. Statistical analysis clarifies that high temperature forming gas annealing can suppress the RTN ΔVth. And properly annealed HK FETs have smaller RTN ΔVth than SiON FETs, due mostly to fewer traps and partly to thinner inversion thickness in HK / MG stacks. Consequently, the influence of RTN on HK / MG gate stacks is less than that of random dopant fluctuation in the 22 nm generation. However, RTN may pose a difficult challenge for the 15 nm generation. In addition to the scaling dependence, we also find that characterizing hysteretic RTN behaviors due to RTN dependence on bias is essential to determine whether the observed RTN has an impact on SRAM operation or not.