B. Govoreanu, L. D. Piazza, J. Ma, Thierry Conard, A. Vanleenhove, A. Belmonte, D. Radisic, M. Popovici, A. Velea, A. Redolfi, O. Richard, S. Clima, C. Adelmann, Hugo Bender, Malgorzata Jurczak
{"title":"Advanced a-VMCO resistive switching memory through inner interface engineering with wide (>102) on/off window, tunable μA-range switching current and excellent variability","authors":"B. Govoreanu, L. D. Piazza, J. Ma, Thierry Conard, A. Vanleenhove, A. Belmonte, D. Radisic, M. Popovici, A. Velea, A. Redolfi, O. Richard, S. Clima, C. Adelmann, Hugo Bender, Malgorzata Jurczak","doi":"10.1109/VLSIT.2016.7573387","DOIUrl":null,"url":null,"abstract":"We demonstrate an advanced a-VMCO nonfilamentary resistive switching memory cell with self-rectifying, self-compliant, forming-free and analog behavior. A BEOL-compatible process yields devices with excellent device-to-device variability, down to 40nm size. Detailed analysis of the a-Si/TiO2 interface enables understanding the barrier resistance modulation, engineered for wider on/off window and current reduction, while preserving an excellent variability. Inner-interface engineered devices have an on/off window well above 102 and reset switching currents of down to ~1uA for 40nm-size cells, scaling with size, without compromising reliability. Furthermore, vertical stack scaling allows to reduce the operating voltages, while preserving or tuning device figures.","PeriodicalId":129300,"journal":{"name":"2016 IEEE Symposium on VLSI Technology","volume":"58 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2016.7573387","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 21
Abstract
We demonstrate an advanced a-VMCO nonfilamentary resistive switching memory cell with self-rectifying, self-compliant, forming-free and analog behavior. A BEOL-compatible process yields devices with excellent device-to-device variability, down to 40nm size. Detailed analysis of the a-Si/TiO2 interface enables understanding the barrier resistance modulation, engineered for wider on/off window and current reduction, while preserving an excellent variability. Inner-interface engineered devices have an on/off window well above 102 and reset switching currents of down to ~1uA for 40nm-size cells, scaling with size, without compromising reliability. Furthermore, vertical stack scaling allows to reduce the operating voltages, while preserving or tuning device figures.
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