Implementation of Pb-free bumping in power packaging

Abstract

MOSFETS are three terminal devices used in energy conversion switching applications. Rds-on is a key metric in assessing the efficiency of the switching solution. Chip and wire interconnect in MOSFET packages generally leads to a solution where the package parasitics significantly affect the overall product Rds-on. The industry has made rapid advances in the last few years to adopt flip chip interconnect. Due to the temperature hierarchy in processing (e.g. use of soft solder die attach for heat dissipation and provide a good electrical contact) the metallurgy of the flip chip required it to be compatible with high temperature processing. The Pb-free solution is required to be very cost effective and amenable to high volume manufacturing due to the nature of the use. Moreover, some recent form factors such the FLMP (Flip Chip in a Leaded Molded Package) and the MOSFET BGA allowed the die to be directly attached to the printed circuit board. The road to defining and implementing a Pb-free solution for bump interconnect for these applications is all the more difficult as the solution to be backward compatible with Pb-based paste as well as with Pb-free paste and yet retain its high temperature stability. Our paper gives details of this novel solution which by its very nature is very cost effective compared to other methods of achieving the same end results. Preliminary reliability results will be presented along with our work in simulating some environments through finite element analysis.