Multi-Transition Fault Model (MTFM) ATPG patterns towards achieving 0 DPPB on automotive designs

Abstract

After a continued analysis of more than a year to reduce DPPB on NXP automotive designs, it was observed that some subtle at-speed defects were not getting screened out using combination of traditional Stuck-At, Transition-Delay and Small-Delay-Defect based ATPG patterns. Traditional delay fault models for automatic test pattern generation target a single transition that propagates to the output(s) of a gate. Single Transition-Delay model finds the stimulus that can sensitize a transition on a port that, in presence of a delay defect, will result in the capture of incorrect state. Failure Analysis data confirmed that multiple transitions on inputs changed the timing of the outputs in a different way than a single transition, in the presence of subtle defect mechanisms in certain library cells. Multiple Input Switching (MIS) is a known STA modeling problem that can affect the timing of a gate under various conditions of load, slew, and temporal distance of signals at the inputs. In this paper, we present a new ATPG fault model that complements the traditional transition delay models and, a method to identify the stimuli required to expose these kinds of defects. The new patterns were first validated on the tester, resulting in proof of concept of new methodology. Later, at-speed Multi-Transition Fault Model (MTFM) ATPG patterns were released for multiple NXP AUTO designs and high-volume yield data from more than 9 million units confirmed unique fallout of at least 0.5ppm from the new MTFM topoff patterns. Also, MTFM based input stimuli comparison was done on limited set of library cells between MTFM and traditional Cell-Aware 2 Time-Frame UDFM based patterns. It was confirmed that only MTFM patterns produced the required multi-transitions through the inputs of the targeted cell instances in multiple designs.