E. Liao, A. Tay, S. Ang, H. Feng, R. Nagarajan, V. Kripesh, R. Kumar, M. Iyer
{"title":"A MEMS-based compliant interconnect for ultra-fine-pitch wafer level packaging","authors":"E. Liao, A. Tay, S. Ang, H. Feng, R. Nagarajan, V. Kripesh, R. Kumar, M. Iyer","doi":"10.1109/ECTC.2006.1645812","DOIUrl":null,"url":null,"abstract":"A novel compliant flip-chip interconnect in the form of a planar microspring is presented in this paper. Different spring geometries are evaluated and compared in terms of compliances and electrical parasitics. It is shown that the J-shape spring design gives a better balanced performance. Further numerical studies reveal the geometric dependence of the compliances of J-shape spring interconnects, and also the influence of the sacrificial material upon the electrical performance of the interconnects. The wafer-level process flow for fabrication of the planar microspring interconnects is described and discussed. Prototype interconnects are fabricated by combining planar technology and 3D surface micromachining technology","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"99 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"56th Electronic Components and Technology Conference 2006","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2006.1645812","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
A novel compliant flip-chip interconnect in the form of a planar microspring is presented in this paper. Different spring geometries are evaluated and compared in terms of compliances and electrical parasitics. It is shown that the J-shape spring design gives a better balanced performance. Further numerical studies reveal the geometric dependence of the compliances of J-shape spring interconnects, and also the influence of the sacrificial material upon the electrical performance of the interconnects. The wafer-level process flow for fabrication of the planar microspring interconnects is described and discussed. Prototype interconnects are fabricated by combining planar technology and 3D surface micromachining technology