Automated Method Using Finite Element Simulation to Identify Microvia Stacks at Risk of Separation in Complex PCB Designs

Abstract

The electronic industry recently experienced a sudden increase in microvia failures in printed circuit boards during the reflow process. The failures occurred specifically on triple-stack microvias placed over a buried via. The failure mechanisms included separation of the microvia from the capture pad and ductile tearing of the copper flanges. The sudden onset of these failures was due to the electronics industry’s over-reliance on design rules to avoid PCB issues. The flaw in design rules is their reliance on lessons learned from previous designs and the assumption that new designs are sufficiently similar to older designs. This pervasive failure mode across multiple industries and designs is evidence that a new, more robust technique based on reliability physics is required for future, high density electronic hardware designs. We propose a technique that takes advantage of finite element modeling and industry research to predict the reliability and manufacturability of microvias.