Highly-accelerated WLR learning cycles for development of a trench MOSFET: Method and case study

Abstract

This work describes the improvement in reliability of a trench MOSFET through modification of the cobalt silicide module. Integration options explored are; (a) use of a nitride spacer, and (b) use of TiN cap during the salicidation process. WLR methodologies are used to quantify improvements that can then undergo more extensive PLR testing. The WLR methodologies used include highly accelerated wafer level bias temperature instability test (WLBTI), and Wafer Level Time Dependent Dielectric Breakdown (WLTDDB).