0.25 /spl mu/m salicide CMOS Technology Thermally Stable Up To 1,000/spl deg/C With High TDDB Reliability

Ohguro, Yoshitomi, Morimoto, Harakawa, Momose, Katsumata, Iwai
{"title":"0.25 /spl mu/m salicide CMOS Technology Thermally Stable Up To 1,000/spl deg/C With High TDDB Reliability","authors":"Ohguro, Yoshitomi, Morimoto, Harakawa, Momose, Katsumata, Iwai","doi":"10.1109/VLSIT.1997.623715","DOIUrl":null,"url":null,"abstract":"INTRODUCTION CoSi2 salicide technology is going to be used for 0.25 pm CMOS not only for the high speed digital application, but also for RF analog application, because of its low sheet resistance of the gate electrode without no 'narrow line effect'. Low gate resistance less than 5 QiU is indispensable for realizinglow noisefigureofless than 1dB ofanalogMOSFET [I]. IJsuaUy, the highest heat process after the CoSi2 salidde process has been less than 800 \"C. However, from the view point of future merged process with RF analog, logic and memory devices, it has been some times requested to use even higher temperature process to anneal capacitor dielectrics or to activate impurities after the salicide process. Thus, it is important to know the thermal stability of the CoSi2 resistance and TDDB reliability of the gate oxide with higher process temperature, for the CoSi2 process to be used in wide range of applications.","PeriodicalId":414778,"journal":{"name":"1997 Symposium on VLSI Technology","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1997 Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1997.623715","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

INTRODUCTION CoSi2 salicide technology is going to be used for 0.25 pm CMOS not only for the high speed digital application, but also for RF analog application, because of its low sheet resistance of the gate electrode without no 'narrow line effect'. Low gate resistance less than 5 QiU is indispensable for realizinglow noisefigureofless than 1dB ofanalogMOSFET [I]. IJsuaUy, the highest heat process after the CoSi2 salidde process has been less than 800 "C. However, from the view point of future merged process with RF analog, logic and memory devices, it has been some times requested to use even higher temperature process to anneal capacitor dielectrics or to activate impurities after the salicide process. Thus, it is important to know the thermal stability of the CoSi2 resistance and TDDB reliability of the gate oxide with higher process temperature, for the CoSi2 process to be used in wide range of applications.
热稳定性高达1000 /spl度/C, TDDB可靠性高
CoSi2 salicide技术将用于0.25 pm CMOS,不仅适用于高速数字应用,也适用于射频模拟应用,因为它的栅极片电阻低,没有“窄线效应”。要实现小于1dB的模拟mosfet的低噪声无噪声是必不可少的[1]。因此,CoSi2卤化工艺后的最高热处理温度已低于800℃。然而,从未来与RF模拟、逻辑和存储器件合并工艺的角度来看,有时要求在卤化工艺后使用更高的温度工艺退火电容器电介质或激活杂质。因此,了解CoSi2电阻的热稳定性和较高工艺温度下栅极氧化物的TDDB可靠性对于CoSi2工艺的广泛应用至关重要。
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