Eliminating race conditions in system-level models by using parallel simulation infrastructure

Weiwei Chen, Che-Wei Chang, Xu Han, R. Dömer
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引用次数: 6

Abstract

For a top-down system design flow, a well-written specification model of an embedded system is crucial for its successful design and implementation. However, the task of writing a correct system-level model is difficult, as it involves, among other tasks, the insertion of parallelism. In this paper, we focus on ensuring model correctness under parallel execution. In particular, the model must be free of race conditions in all accesses to shared variables, so that a safe parallel implementation is possible. Eliminating race conditions is difficult because discrete event simulation often hides such flaws. In particular, the absence of simulation errors does not prove the correctness of the model. We propose to use advanced conflict analysis in the compiler, fast checking in a parallel simulator, and a novel race-condition diagnosis tool, that not only exposes all race conditions, but also locates where and when such problems occur. Our experiments have revealed a number of dangerous race conditions in existing embedded multi-media application models and enabled us to efficiently and safely eliminate these hazards.
利用并行仿真基础设施消除系统级模型中的竞争条件
对于自顶向下的系统设计流程,编写良好的嵌入式系统规范模型对于其成功的设计和实现至关重要。然而,编写正确的系统级模型的任务是困难的,因为它涉及到并行性的插入等任务。在本文中,我们着重于保证并行执行下的模型正确性。特别是,模型必须在对共享变量的所有访问中不存在竞争条件,这样才能实现安全的并行实现。消除竞争条件是困难的,因为离散事件模拟常常隐藏了这些缺陷。特别是,没有仿真误差并不能证明模型的正确性。我们建议在编译器中使用先进的冲突分析,在并行模拟器中使用快速检查,以及一种新的竞争条件诊断工具,不仅可以显示所有的竞争条件,还可以定位这些问题发生的地点和时间。我们的实验揭示了现有嵌入式多媒体应用模型中存在的一些危险的竞态条件,并使我们能够有效安全地消除这些危险。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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