Detection of transient faults in microprocessors by concurrent monitoring

M. Z. Khan, J. Tront
{"title":"Detection of transient faults in microprocessors by concurrent monitoring","authors":"M. Z. Khan, J. Tront","doi":"10.1109/TEST.1989.82399","DOIUrl":null,"url":null,"abstract":"Summary form only given. A novel approach, called concurrent processor monitoring for on-line detection of transient faults, that attempts to achieve high error coverage with small error detection latency is proposed. The concept of the execution profile of an instruction is defined and is used for detecting control flow and execution errors. To implement this scheme, a watchdog processor is designed for monitoring operation of the main processor. The effectiveness of this technique is demonstrated through computer simulations. Simulation studies on an 8086-based system indicate a fault coverage of 97% and a very small fault latency time. The hardware overhead for the watchdog processor is about 28%. By use of the basic design concept, test hardware could be implemented directly on the microprocessor chip and the hardware cost would be further reduced.<<ETX>>","PeriodicalId":264111,"journal":{"name":"Proceedings. 'Meeting the Tests of Time'., International Test Conference","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 'Meeting the Tests of Time'., International Test Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.1989.82399","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Summary form only given. A novel approach, called concurrent processor monitoring for on-line detection of transient faults, that attempts to achieve high error coverage with small error detection latency is proposed. The concept of the execution profile of an instruction is defined and is used for detecting control flow and execution errors. To implement this scheme, a watchdog processor is designed for monitoring operation of the main processor. The effectiveness of this technique is demonstrated through computer simulations. Simulation studies on an 8086-based system indicate a fault coverage of 97% and a very small fault latency time. The hardware overhead for the watchdog processor is about 28%. By use of the basic design concept, test hardware could be implemented directly on the microprocessor chip and the hardware cost would be further reduced.<>
微处理器暂态故障的并发监测
只提供摘要形式。提出了一种用于暂态故障在线检测的新方法——并发处理器监测,该方法试图以小的错误检测延迟实现高的错误覆盖率。定义了指令执行概要的概念,并将其用于检测控制流和执行错误。为了实现这一方案,设计了一个看门狗处理器来监控主处理器的运行。通过计算机仿真验证了该方法的有效性。在基于8086的系统上的仿真研究表明,故障覆盖率为97%,故障延迟时间非常短。看门狗处理器的硬件开销约为28%。利用基本的设计思想,测试硬件可以直接在微处理器芯片上实现,从而进一步降低硬件成本。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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