ICAT: incremental combinational ATPG

Abstract

An incremental ATPG system for combinational circuits, ICAT, is presented. ICAT uses the hypothesis that, if a circuit modification is small, the old tests for the circuit before modification can provide crucial information to speed up generation of new tests for the modified circuit. Four incremental techniques in ICAT maximally utilize information from the old tests with minimal storage requirements. The four incremental techniques are augmented with a fast, effective deterministic test generation algorithm in ICAT. The experimental results from the evaluation of three different classes of modifications to ISCAS circuits show the incremental technique to be efficient and effective.<>