{"title":"Error-correcting Goldschmidt dividers using time shared TMR","authors":"W. Gallagher, E. Swartzlander","doi":"10.1109/DFTVS.1998.732170","DOIUrl":null,"url":null,"abstract":"Several implementations of division are based on the Goldschmidt, or series expansion, algorithm. It has a number of advantages, including quadratic convergence to the solution and two independent, and hence pipelinable, multiplies per iteration. Applying time shared triple modular redundancy (TSTMR) to such a divider allows the use of a smaller multiplier and requires triplicating the divider circuit. The smaller multiplier completes larger multiplications in several cycles using feedback registers. While this reduces the size of the fault tolerant divider over that of traditional TMR, there is a substantial penalty to latency. However, because early stages of the algorithm do not require high-precision multiplications, and rounding the quotient by computing the inverse function does not require a full-precision multiplication, the algorithm can be modified to reduce multiplication cycles. The resulting error-correcting dividers can be both faster and smaller than fault-tolerant dividers using traditional TMR.","PeriodicalId":245879,"journal":{"name":"Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1998.732170","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
Several implementations of division are based on the Goldschmidt, or series expansion, algorithm. It has a number of advantages, including quadratic convergence to the solution and two independent, and hence pipelinable, multiplies per iteration. Applying time shared triple modular redundancy (TSTMR) to such a divider allows the use of a smaller multiplier and requires triplicating the divider circuit. The smaller multiplier completes larger multiplications in several cycles using feedback registers. While this reduces the size of the fault tolerant divider over that of traditional TMR, there is a substantial penalty to latency. However, because early stages of the algorithm do not require high-precision multiplications, and rounding the quotient by computing the inverse function does not require a full-precision multiplication, the algorithm can be modified to reduce multiplication cycles. The resulting error-correcting dividers can be both faster and smaller than fault-tolerant dividers using traditional TMR.