{"title":"Functional analysis of circuits under timing variations","authors":"M. Dehbashi, G. Fey, K. Roy, A. Raghunathan","doi":"10.1109/ETS.2012.6233031","DOIUrl":null,"url":null,"abstract":"Summary form only given. This work proposes an approach to model and evaluate the functional behavior of logic circuits under timing variations. In the approach, first we construct a Time Accurate Model (TAM) of the circuit to represent its timing behavior in a functional domain under a discrete time model. Then, timing variations are applied by using Variation Logic (VL).","PeriodicalId":429839,"journal":{"name":"2012 17th IEEE European Test Symposium (ETS)","volume":"311 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 17th IEEE European Test Symposium (ETS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ETS.2012.6233031","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Summary form only given. This work proposes an approach to model and evaluate the functional behavior of logic circuits under timing variations. In the approach, first we construct a Time Accurate Model (TAM) of the circuit to represent its timing behavior in a functional domain under a discrete time model. Then, timing variations are applied by using Variation Logic (VL).